Snubber circuits are often utilized to protect power transistors which are used in power converters. Such power switches are typically turned on and off to modulate the flow of power through a load or other circuit. Snubber circuitry is often connected across the main current path electrodes of the power switch to reduce the power dissipated thereby during turn-off. Usually, the snubber circuit includes a capacitor coupled across the main current path electrodes which acts as a shunt path for current which would otherwise flow through the power switch at turn-off. This shunting of currents at turn-off limits the power dissipated by the power switch and thus minimizes the risk of damage to the power switch.
Snubber circuits of the so called "lossless" type have been devised wherein some or all of the power shunted away from the power switch during turn-off is employed for a useful purpose or returned to a source of power. Examples of these types of snubber circuits are disclosed in Ferraro, U.S. Pat. No. 4,438,486, Gallios, et al., U.S. Pat. No. 4,566,059, Henderson, U.S. Pat. No. 4,607,322 (assigned to the assignee of the instant application), McGuire, U.S. Pat. No. 4,626,980, Noworolski, et al., U.S. Pat. No. 4,639,849 and Pruitt, U.S. Pat. No. 4,691,270.
A different problem which arises in the operation of power converters using two or more power switches connected in series across a DC power source concerns the possibility of shoot-through. Typically, such switches are operated by gating signals of which one is an inverted version of the other so that there is no time at which both gating signals are in a state commanding turn-on of both switches However, the characteristics of these power switches may cause a delay in turn-off of one of the switches while the other switch is turned on, thereby resulting in a condition wherein the DC source is short-circuited. Such a shoot-through condition can damage or destroy the power switches. Prior attempts at preventing shoot-through have relied upon the imposition of a short dwell period between a command for turn-off of one transistor and a command for turn-on of the other series-connected power transistor in order to assure that the first transistor is fully off. Other types of circuits have been devised which inhibit turn-on of a power switch until the collector-to-emitter voltage or base-to-emitter voltage of a second power switch connected in series therewith indicates that the latter switch is off.